Analog Array Processor with Digital Resolution Enhancement and Offset Compensation

Abstract — A mixed-mode inner-product vector processor is presented. It performs high-dimensional matrix-vector multiplication on a fine-grain analog array and has a purely-digital interface. The array incorporates charge-mode analog computational cells and row-parallel analog-to-digital converters (ADC). Each of the cells includes a dynamic storage element and a charge injection device computing binary inner-product of two arguments. This eliminates constraints on memory-processor communication bandwidth leading to very high computational throughput limited only by the capacity of the array. The matrix elements are stored in the array in bit-parallel fashion, and the input vector is presented bit-serially. Digital post-processing allows to construct resulting inner-products with precision higher than that of each A/D conversion. In addition, analog computation offset errors are compensated for in a multi-chip configuration. The architecture is tailored for high-density VLSI implementation.